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ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 1 1 product overview the ks57c0404/c0408 single-chip cmos microcontroller has been designed for very high - performance using samsung's newest 4 - bit cpu core, sam47 ( samsung arrangeable microcontrollers). the ks57p0408 is the microcontroller which has 8k-bytes one-time-programmable rom and the functions are same to ks57c0404/c0408. with two 8-bit timer / counters, an 8-bit serial i/o interface, and eight software n-channel open-drain i/o pins, the ks57c0404/c0408 offers an excellent design solut io n for a wide variety of general-purpose applicat ions . up to 36 pins of the 42-pin sdip or 44-pin qfp package can be dedicated to i/o . seven vectored interrupts provide fast response to internal and external events. in additio n, the ks57c0404/c0408 's advanced cmos technology provides for low power consumpt io n and a wide operating voltage range.
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 2 features summary memory 512 4-bit ram 4096 8-bit rom: ks57c0404 8192 8-bit rom: KS57C0408 36 i/o pins input only: 4 pins i/o: 24 pins n-channel open-drain i/o: 8 pins memory-mapped i/o structure data memory bank 15 8-bit basic timer 4 interval timer functions two 8-bit timer/counters programmable interval timer external event counter function timer/counters clock outputs to tclo0 and tclo1 pins watch timer time interval generation: 0.5 s, 3.9 ms at 4.19 mhz 4 frequency outputs to the buz pin 8-bit serial i/o interface 8-bit transmit/receive mode 8-bit receive mode lsb-first or msb-first transmission selectable bit sequential carrier supports 16-bit serial data transfer in arbitrary format interrupts 3 external interrupt vectors 4 internal interrupt vector s 2 quasi-interrupts power-down modes idle: only cpu clock stops stop: system clock stops oscillation sources crystal or ceramic for system clock oscillation frequency : 0.4 ? 6.0mhz cpu clock divider circuit (by 4. 8, or 64) instruction execution times 0.95, 1.91, 15.3 m s at 4.19 mhz 0.67, 1.33, 10.7 m s at 6.0 mhz operating temperature - 40 c to 85 c operating voltage range 1.8 v to 5.5 v (main) 2.0 v to 5.5 v (otp) package types 42-pin sdip, 44-pin qfp
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 3 function overview sam47 cpu all ks57-series microcontrollers have the advanced sam47 cpu core. the sam47 cpu can directly address up to 32k-byte of program memory. the arithmetic logic unit(alu) performs 4-bit addition, subtraction, logical, and shift-and-rotate operations in one instruction cycle and most 8-bit arithmetic and logical operation in two cycles. cpu registers program counter a 12-bit program counter (pc) stores addresses for instruction fetches during program execution. usually, the pc is incremented by the number of bytes of the fetched instruction. the one instruction fetch that does not increment the pc is the 1-byte ref instruction which references instruction stored in a look-up table in the rom. whenever a reset operation or an interrupt occurs, bits pc12 though pc0 are set to the vector address. stack pointer an 8-bit stack pointer (sp) stores addresses for stack operation. the stack area is located in general-purpose data memory bank 0. the sp is 8-bit read/ writeable and sp bit 0 must always be logic zero. during an interrupt or a subroutine call, the pc value and the psw are written to the stack area. when the service routine has completed, the values referenced by the stack pointer are restored. then, the next instruction is executed. the stack pointer can access the stack despite data memory access enable flag status. since the reset value of the stack pointer is not defined in firmware, you use program code to initialize the stack pointer to 00h. this sets the first register of the stack area to data memory location 0ffh. program memory in its standard configuration, the 4096 x 8-bit (ks57c0404), 8192 x 8-bit (KS57C0408) rom is divided into four areas: ? 16-byte area for vector addresses ? 96-byte instruction reference area ? 16-byte general-purpose area (0010 ? 001fh) ? 3968-byte area for general-purpose program memory (ks57c0404) ? 8064-byte area for general-purpose program memory (KS57C0408) the vector address area is used mostly during reset operation and interrupts. these 16 bytes can alternately be used as general-purpose rom. the ref instruction references 2x1-byte or 2-byte instruction stored in reference area location 0020h ? 007fh. ref can also reference three-byte instruction such as jp or call. so that a ref instruction can reference these instruction, however, the jp or call must be shortened to a 2-byte format. to do this, jp or call is written to the reference area with the format tjp or tcall instead of the normal instruction name. unused location in the ref instruction look-up area can be allocated to general-purpose use.
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 4 data memory overview the 512 x 4bit data memory has five areas: ? 32 x 4-bit working register area ? 224 x 4-bit general-purpose area in bank 0 which is also used as the stack area ? 256 x 4-bit general-purpose area in bank 1 ? 128 x 4-bit area in bank 15 for memory-mapped i/o addresses the data memory area is also organized as three memory banks ? bank0, bank1, and bank15. you use the select memory bank instruction (smb) to select one of the banks as working data memory. data stored in ram location are 1-, 4-, and 8-bit addressable. after a hardware reset, data memory initialization values must be defined by program code. data memory addressing modes the enable memory bank (emb) flag controls the addressing mode for data memory banks 0, 1, or 15. when the emb flag is logic zero, only location 00h ? 7fh of bank 0 and bank 15 can be accessed. when the emb flag is set to logic one, all three data memory banks can be accessed based on the current smb value. working registers the ram's working register area in data memory bank 0 is also divided into four register banks. each register bank has eight 4-bit registers. paired 4-bit registers are 8-bit addressable. register a can be used as a 4-bit accumulator and double register ea as an 8-bit extended accumulator; double registers wx, wl, and hl are used as address pointers for indirect addressing. to limit the possibility of data corruption due to incorrect register addressing, it is advisable to use bank 0 for main programs and banks 1, 2, and 3 for interrupt service routines. bit sequential carrier the bit sequential carrier (bsc) mapped in data memory bank 15 is a 16-bit general register that you can manipulate using 1-, 4-, and 8-bit ram control instructions. using the bsc register, addresses and bit location can be specified sequentially using 1-bit indirect addressing instructions. in this way, a program can generate 16-bit data output by moving the bit location sequentially, incrementing or decrementing the value of the l register. you can also use direct addressing to manipulate data in the bsc.
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 5 control registers program status word the 8-bit program status word (psw) controls alu operation and instruction execution sequencing. it is also used to restore a program's execution environment when an interrupt has been serviced. program instructions can always address the psw regardless of the current value of data memory access enable flags. before an interrupt is processed, the psw is pushed onto the stack in data memory bank 0. when the routine is completed, psw values are restored. is1 is0 emb erb c sc2 sc1 sc0 interrupt status flags (is1, is0), the enable memory bank and enable register bank flags (emb, erb), and the carry flag ( c ) are 1- and 4-bit read/write or 8-bit read-only addressable. skip condition flags (sc0 ? sc2) can be addressed using 8-bit read instructions only. select bank (sb) register two 4-bit location called the sb register store address values used to access specific memory and register banks: the select memory bank register, smb, and the select register bank register, srb. 'smb n' instructions select a data memory bank (0, 1, or 15) and store the upper four bits of the 12-bit data memory address in the smb register. the 'smb n' instruction is used to select register bank 0, 1, 2, or 3, and to store the address data in the srb. the instructions 'push sb' and 'pop sb' move smb and srb values to and from the stack for interrupts and subroutines. clock circuits system oscillation circuit generates the internal clock signals for the cpu and peripheral hardwares. the system clock can use a crystal, ceramic, or rc oscillation source, or an externally-generated clock signal. to drive ks57c0404/c0408 using an external clock source, the external clock signal should be input to x in , and its inverted signal to x out . a 4-bit power control register is used to enable or disable oscillation, and to select the cpu clock. the internal system clock signal ( fx) can be divided internally to produce three cpu clock frequencies ? fx/4, fx/8, or fx/64. interrupts interrupt requests can be generated internally by on-chip processes (intb, intt0, intt1, and ints) or externally by peripheral devices (int0, int1, and int4). there are two quasi-interrupts: int2 and intw. int2/ks0 ? ks7 detects rising/falling edges of incoming signals and intw detects time intervals of 0.5 seconds of 3.91 milliseconds at 4.19mhz. the following components support interrupt processing: ? interrupt enable flags ? interrupt request flags ? interrupt priority registers ? power-down termination circuit
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 6 power-down to reduce power consumption, there are two power-down modes: idle and stop. the idle instruction initiates idle mode and the stop instruction initiates stop mode. in idle mode, only the cpu clock stops while peripherals and the oscillation source continue to operate normally. stop mode effects only the system clock. in stop mode system clock oscillation stops completely, halting all operations except for a few basic peripheral functions. reset or an interrupt (with the exception of int0) can be used to terminate either idle or stop mode. reset when a reset signal occurs during normal operation or during power-down mode, the cpu enters idle mode when the reset operation is initiated. when the standard oscillation stabilization interval (31.3 ms at 4.19 mhz) has elapsed, normal cpu operation resumes. i/o ports the ks57c0404/c0408 has 9 i/o ports. pin addresses for all i/o ports are mapped to locations ff0h ? ffch in bank 15 of the ram. there are 4 input pins, 24 configurable i/o pins, and 8 software n-channel open-drain i/o pins, for a total of 36 i/o pins. the contents of i/o port pin latches can be read, writen, or tested at the corresponding address using bit manipulation instructions. timers and timer/counters the timer function has four main components: an 8-bit basic interval timer, two 8-bit timer/counters, and a watch timer. the 8-bit basic timer generates interrupt requests at precise intervals, based on the selected cpu clock frequency. the programmable 8-bit timer/counters are used for external event counting, generation of arbitrary clock frequencies for output, and dividing external clock signals. the 8-bit timer/counter 0 generates a clock signal ( sck ) for the serial i/o interface. the watch timer has an 8-bit watch timer mode register, a clock selector, and a frequency divider circuit. its functions include real-time and watch-time measurement, and frequency outputs for buzzer sound. serial i/o interface the serial i/o interface supports the transmission or reception of 8-bit serial data with an external device. the serial interface has the following functional components: ? 8-bit mode register ? clock selector circuit ? 8-bit buffer register ? 3-bit serial clock counter the serial i/o circuit can be set either to transmit-and-receive or to receive-only mode. msb-first or lsb-first transmission is also selectable. the serial interface operates with an internal or an external clock source, or using the clock signal generated by the 8-bit timer/counter 0. to modify transmission frequency, the appropriate bits in the serial i/o mode register (smod) must be manipulated.
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 7 block diagram p4.0 - 4.3 p5.0 - 5.3 p6.0 - 6.3 / ks0 - s3 p7.0 - 7.3 / ks4 - s7 arithmetic and logic unit interrupt control block instruction register program counter program status word 512 x 4-bit data memory program memory 4 kbyte: ks57c0404 8 kbyte: KS57C0408 8-bit timer/ counter 0 stack pointer instruction decoder clock reset xin xout internal interrupts i/o port 4 i/o port 5 8-bit timer/ counter 1 i/o port 6 i/o port 7 int0, int1, int2,int4 b a s ic timer watch timer p0.0 / sck p0.1 / so p0.2 / si p0.3 / btco i/o port 0 serial i/o p1.0 / int0 p1.1 / int1 p1.2 / int2 p1.3 / int4 input port 1 p2.0 / tclo0 p2.1 / tclo1 p2.2 / clo p2.3 / buz i/o port 2 p3.0 / tcl0 p3.1 / tcl1 p3.2 p3.3 i/o port 3 p8.0 - 8.3 i/o port 8 figure 1 ? 1 . ks57c 0404/c 0408 /p0408 block diagram
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 8 pin assignments nc p8.0 p8.1 p8.2 p8.3 p0.0 / sck p0.1 / so p0.2 / si p0.3 / btco p2.0 / tclo0 p2.1 / tclo1 vss p7.0 / ks4 p7.1 / ks5 p7.2 / ks6 p7.3 / ks7 p6.0 / ks0 p6.1 / ks1 p6.2 / ks2 p6.3 / ks3 xin xout reset p5.0 p5.1 p5.2 p5.3 p4.0 p4.1 p4.2 p4.3 test 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 p1.3 / int4 p1.2 / int2 p1.1 / int1 p1.0 / int0 p2.3 / buz p2.2 / clo p2.1 / tclo1 p2.0 / tclo0 p0.3 / btco p0.2 / si p0.1 / so p0.0 / sck p8.3 p8.2 p8.1 p8.0 p3.3 p3.2 p3.1 / tcl1 p3.0 / tcl0 vdd ks57c0404/c0408 (42-sdip-600) p2.2 / clo p2.3 / buz p1.0 / int0 p1.1 / int1 p1.2 / int2 p1.3 / int4 vss p7.0 / ks4 p7.1 / ks5 p7.2 / ks6 p7.3 / ks7 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 nc p3.3 p3.2 p3.1 / tcl1 p3.0 / tcl0 vdd test p4.3 p4.2 p4.1 p4.0 ks57c0404/c0408 (44-qfp-1010b) 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 p5.3 p5.2 p5.1 p5.0 reset xout xin p6.3/ks3 p6.2/ks2 p6.1/ks1 p6.0/ks0 figure 1 ? 2 . ks57c0404/c0408 pin assignment diagrams
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 9 pin descript i/o ns table 1 ? 1. ks57c 0404/c 0408 /p0408 pin descri ption pin name pin type descript ion number share pin p0.0 p0.1 p0.2 p0.3 i / o 4-bit i/o port. 1-bit or 4-bit read / write and test is possible. individual pins are software configurable as input or output. 4-bit pull-up resistors are software assignable; pull-up re sistors are automatically disabled for output pins. 12 (28) 11 (27) 10 (26) 9 (25) sck so si btco p1.0 p1.1 p1.2 p1.3 i 4-bit input port. 1-bit and 4-bit read and test is possible. 3-bit pull-up resistors are assignable by software to pins p1.0, p1.1, and p1.2. 4 (20) 3 (19) 2 (18) 1 (17) int0 int1 int2 int4 p2.0 p2.1 p2.2 p2.3 i/o same as port 0. 8 (24) 7 (23) 6 (22) 5 (21) tclo0 tclo1 clo buz p3.0 p3.1 p3.2 p3.3 i/o same as port 0. 20 (38) 19 (37) 18 (36) 17 (35) tcl0 tcl1 p4.0 ? p4.3 p5.0 ? p5.3 i/o 4-bit i/o ports. n-channel open-drain output up to 9?volts. 1-bit and 4-bit read / write and test is possible. ports 4 and 5 can be paired to support 8-bit data transfer. 8-bit unit pull-up resistors are assignable by mask option. 26 ? 23 (44 ? 41) 30 ? 27 (4 ? 1) ? p6.0 ? p6.3 p7.0 ? p7.3 i/o 4-bit i/o ports. 1-bit or 4-bit read / write and test is possible. port 6 pins are individually software configurable as input or output. 4-bit pull -up resistors are software assignable; pull-up re sistors are automatically disabled for output pins (port 6 only). ports 6 and 7 can be paired to enable 8-bit data transfer. 37 ? 34 (11 ? 8) 41 ? 38 (15 ? 12) ks0 ? ks3 ks4 ? ks7 p8.0 ? p8.3 i/o 4-bit i/o ports. 1-bit and 4-bit read / write and test is possible. pins are individually soft ware configurable as input or output. 4-bit pull-down resistors are software assignable; pull-down resistors are auto matically disabled for output pins. 16 ? 13 (32 ? 29) ? note: parentheses indicate pin number for 44 qfp package.
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 10 table 1 ? 1. ks57c0404/c0408 pin descript ions (continued) pin name pin type descript ion number share pin sck i/o serial i/o interface clock signal 12 (28) p0.0 so i/o serial data output 11 (27) p0.1 si i/o serial data input 10 (26) p0.2 btco i/o basic timer clock output (2 hz, 16 hz, 64 hz, or 256 hz at 4.19 mhz) 9 (25) p0.3 int0, int1 i external interrupts. the triggering edge for int0 and int1 is selectable. int0 is synchronized to system clock. 4, 3 (20, 19) p1.0, p1.1 int2 i quasi-interrupt with detect ion of rising edges 2 (18) p1.2 int4 i external interrupt with detect ion of rising and falling edges. 1 (17) p1.3 tclo0 i/o timer / counter 0 clock output 8 (24) p2.0 tclo1 i/o timer / counter 1 clock output 7 (23) p2.1 clo i/o clock output 6 (22) p2.2 buz i/o 2 khz, 4 khz, 8 khz, or 16 khz frequency output at 4.19 mhz for buzzer sound 5 (21) p2.3 tcl0 i/o external clock input for timer / counter 0 20 (38) p3.0 tcl1 i/o external clock input for timer / counter 1 19 (37) p3.1 ks0 ? ks3 ks4 ? ks7 i/o quasi-interrupt inputs with falling edge detect ion 37 ? 34 (11 ? 8) 41 ? 38 (15 ? 12) p6.0 ? p6.3 p7.0 ? p7.3 v dd ? power supply 21 (39) ? v ss ? ground 42 (16) ? reset i reset signal 31 (5) ? x in , x out ? crystal, ceramic, or rc oscillator signal for system clock (for external clock input, use x in and input x in 's reverse phase to x out ) 33, 32 (7, 6) ? test ? test signal input (must be connected to v ss ) 22 (40) ? nc ? no connect ion (must be connected to v ss ) (33, 34) ? note: parentheses indicate pin number for 44 qfp package.
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 11 table 1 ? 2. overview of ks57c0404/c0408 pin data pin names share pins i/o type reset value circuit type p0.0 ? p0.3 sck , so, si, btco i/o input d-1 p1.0 ? p1.2 int0, int1, int2 i input a-3 p1.3 int4 i input b-4 p2.0 ? p2.3 tclo0, tclo1, clo, buz i/o input d p3.0 ? p3.1 tcl0, tcl1 i/o input d-1 p3.2 ? p3.3 ? i/o input d p4.0 ? p4.3 p5.0 ? p5.3 ? i/o (note) e-2 p6.0 ? p6.3 p7.0 ? p7.3 ks0 ? ks3 ks4 ? ks7 i/o input d-1 p8.0 ? p8.3 ? i/o input d-2 x in , x out ? ? ? ? reset ? i ? b test ? i ? ? nc ? ? ? ? v dd , v ss ? ? ? ? note : when pull-up resistors are provided, port 4 and port 5 pins are reset to high level; with no pull-ups, they are reset to high impedance.
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 12 pin circuit diagrams p - channel in n - channel v dd figure 1 ? 3. pin circuit type a p - channel pull-up resistor pull-up resistor enable schmitt trigger in v dd figure 1 ? 4. pin circuit type a ? 3 in v dd pull-up resistor schmitt trigger figure 1 ? 5. pin circuit type b schmitt trigger in figure 1 ? 6. pin circuit type b ? 4
ks57c0404/c0408/p0408 microcontroller pro duct overview 1 ? 13 p - channel data output disable out n - channel v dd figure 1 ? 7. pin circuit type c p - channel pull-up resistor resistor enable circuit type c data output disable circuit type a i/o v dd figure 1 ? 8. pin circuit type d p - channel pull-up resistor resistor enable circuit type c data output disable schmitt trigger i/o v dd figure 1 ? 9. pin circuit type d-1 n - channel pull-down resistor resistor enable circuit type c data output disable circuit type a i/o figure 1 ? 10. pin circuit type d ? 2
product overview ks57c0404/c0408/p04 08 microcontroller 1 ? 14 data output disable v dd i/o n - channel figure 1 ? 11. pin circuit type e-2
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 1 13 electrical data in this section, information on ks57c0404/0408 electrical characteristics is presented as tables and graphics. the information is arranged in the following order: standard electrical characteristics ? absolute maximum ratings ? d.c. electrical characteristics ? system clock oscillator characteristics ? i/o capacitance ? a.c. electrical characteristics ? operating voltage range miscellaneous timing waveforms ? a.c timing measurement point ? clock timing measurement at x in and x out ? tcl timing ? input timing for reset ? input timing for external interrupts ? serial data transfer timing stop mode characteristics and timing waveforms ? ram data retention supply voltage in stop mode ? stop mode release timing when i nitiated by reset ? stop mode release timing when initiated by an interrupt request
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 2 table 13 ? 1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating units supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v i1 all i/o ports except 4 and 5 ? 0.3 to v dd + 0.3 v output voltage v o ? ? 0.3 to v dd + 0.3 v output current high i oh one i/o port active ? 15 ma all i/o ports active ? 30 output current low i ol one i/o port active + 30 (peak value) ma + 15 (note) all i/o ports, total + 100 (peak value) + 60 (note) operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c note: the values for output current low ( i ol ) are calculated as peak value duty .
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 3 table 13 ? 2. d.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max units input high voltage v ih1 all input pins except those specified below for v ih2 ? v ih4 0.7 v dd ? v dd v v ih2 ports 0, 1, 3, 6, 7, and reset 0.8 v dd v ih3 ports 4 and 5 with pull-up resistors assigned 0.7 v dd ports 4 and 5 are open-drain v ih4 x in and x out v dd ? 0.1 input low voltage v il1 all input pins except those specified below for v il2 ? v il3 ? ? 0.3 v dd v v il2 ports 0, 1, 3, 6, 7, and reset 0.2 v dd v il3 x in and x out 0.1 output high voltage v oh i oh = ? 1 ma ports except 1, 4, and 5 v dd ? 1.0 ? ? v output low voltage v ol1 v dd = 4.5 v to 5.5 v i ol = 15 ma, ports 4, 5 only ? ? 2 v v dd = 1.8 to 5.5 v i ol = 1.6ma 0.4 v ol2 v dd = 4.5 v to 5.5 v i ol = 4 ma all output ports except ports 4,5 2 v dd = 1.8 to 5.5 v i ol = 1.6ma 0.4 input high leakage current i lih1 v i = v dd all input pins except those specified below for i lih2 ? ? 3 a i lih2 v i = v dd x in and x out 20 input low leakage current i lil1 v i = 0 v all input pins except below and reset ? ? ? 3 a i lil2 v i = 0 v x i n and x out only ? 20
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 4 table 13 ? 2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max units output high leakage current i loh v o = v dd, all output pins ? ? 3 a output low leakage current i lol v o = 0 v, all output pins ? ? ? 3 a pull-up resistor r l1 v i = 0 v; v dd = 5 v ports 0, 1 (not p1.3), 2, 3, 6, 7 25 47 100 k w v dd = 3 v 50 95 200 r l2 v o = v dd ? 2v; v dd = 5v ports 4 and 5 only 15 47 70 v dd = 3 v 10 45 60 r l3 v dd = 5 v; v i = 0v; reset 100 220 400 v dd = 3 v 200 450 800 pull-down r l4 v dd = 5 v; v i = v dd ; port 8 25 47 100 k w resistor v dd = 3 v 50 95 200 supply i dd1 run mode; v dd = 5 v 10% 6.0 mhz ? 3.9 8.0 ma current (1) crystal oscillator; c1 = c2 = 22 pf 4.19 mhz 2.9 5.5 v dd = 3 v 10% 6.0 mhz 1.8 4.0 4.19 mhz 1.3 3.0 i dd2 run mode; v dd = 5 v 10% 6.0 mhz ? 1.3 2.5 ma crystal oscillator, c1 = c2 = 22 pf 4.19 mhz 1.2 1.8 v dd = 3 v 10% 6.0 mhz 0.5 1.5 4.19 mhz 0.44 1.0 i dd 3 stop mode; v dd = 5 v 10% ? 0.2 3 a stop mode; v dd = 3 v 10% 0.1 2 notes 1. d.c. electrical values for supply current (i dd1 to i dd3 ) do not include current drawn through internal pull-up resistors. 2. the supply current assumes a cpu clock of fx/4.
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 5 table 13 ? 3. main system clock oscillator characteristics (t a = ? 40 c + 85 c, v dd = 1.8 v to 5.5 v) oscillator clock configuration parameter test condition min typ max units ceramic oscillator xin xout c1 c2 oscillation frequency (1) v dd = 2.7 v to 5.5 v 0.4 ? 6.0 mhz v dd = 1.8 v to 5.5 v 0.4 ? 4.2 stabilization time (2) v dd = 3 v ? ? 4 ms crystal oscillator xin xout c1 c2 oscillation frequency (1) v dd = 2.7 v to 5.5 v 0.4 ? 6.0 mhz v dd = 1.8 v to 5.5 v 0.4 ? 4.2 stabilization time (2) v dd = 3 v ? ? 10 ms external clock xin xout x in input frequency (1) v dd = 2.7 v to 5.5 v 0.4 ? 6.0 mhz v dd = 1.8 v to 5.5 v 0.4 ? 4.2 x in input high and low level width (t xh , t xl ) ? 83.3 ? 1250 ns notes 1. oscillation frequency and x in input frequency data are for oscillator characteristics only. 2. stabilization time is the interval required for oscillating stabilization after a power-on occurs, or when stop mode is terminated.
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 6 table 13 ? 4. input/output capacitance (t a = 25 c, v dd = 0 v ) parameter symbol condition min typ max units input capacitance c in f = 1 mhz; unmeasured pins are returned to v ss ? ? 15 pf output capacitance c out i/o capacitance c io table 13 ? 5. a.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max units instruction cycle time t cy v dd = 2.7 v to 5.5 v 0.67 ? 64 s v dd = 1.8 v to 5.5 v 0.95 tcl0, tcl1 input frequency f ti0 , f ti1 v dd = 2.7 v to 5.5 v 0 ? 1.5 mhz v dd = 1.8 v to 5.5v 1 tcl0, tcl1 input high, low width t tih0 , t til0 t tih1 , t til1 v dd = 2.7 v to 5.5 v 0.48 ? ? s v dd = 1.8 v to 5.5 v 1.8 sck cycle time t kcy v dd = 2.7 v to 5.5 v external sck source 800 ? ? s internal sck source 670 v dd = 1.8 v to 5.5 v external sck source 3200 internal sck source 3800 sck high, low width t kh, t kl v dd = 2.7 v to 5.5 v external sck source 335 ? ? s internal sck source t kcy / 2 ? 50 v dd = 1.8 v to 5.5 v external sck source 1600 internal sck source t kcy / 2 ? 150
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 7 table 13 ? 5. a.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max units si setup time to sck high t sik v dd = 2.7 v to 5.5 v external sck source 100 ? ? ns internal sck source 150 v dd = 1.8 v to 5.5 v external sck source 150 internal sck source 500 si hold time to sck high t ksi v dd = 2.7 v to 5.5 v external sck source 400 ? ? ns internal sck source 400 v dd = 1.8 v to 5.5 v external sck source 600 internal sck source 500 output delay for sck to so t kso (1) v dd = 2.7 v to 5.5 v external sck source ? ? 300 ns internal sck source 250 v dd = 1.8 v to 5.5 v external sck source 1000 internal sck source 1000 interrupt input high, low width t inth , t intl int0 (2) ? ? m s int1, int2, int4, ks0 - ks7 10 reset input low width t rsl input 10 ? ? m s notes 1. r( 1kohm) and c(100pf) are the load resistance and load capacitance of the so output line. 2. minimum value for int0 is based on a clock of 2t cy or 128 / fx as assigned by the imod0 register setting.
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 8 cpu clock = 1/n x oscillator frequency (n = 4, 8, 64) 1 2 3 4 5 6 7 supply voltage (v) 1.05 khz 1.5 mhz 15.625 khz cpu clock 4.2 mhz 6 mhz 400 khz main osc. freq. ( divided by 4 ) figure 13 ? 1. standard operating voltage range table 13 ? 6. ram data retention supply voltage in stop mode (t a = ? 40 c to + 85 c) parameter symbol conditions min typ max unit data retention supply voltage v dddr ? 1.5 ? 5.5 v data retention supply current i dddr v dddr = 1.5 v ? 0.1 10 m a release signal set time t srel ? 0 ? ? m s oscillator stabilization wait t wait released by reset ? 2 17 / fx ? ms time (1) released by interrupt ? (2) ? ms notes 1. during oscillator stabilization wait time, all cpu operations must be stopped to avoid instability during oscillator start-up. 2. use the basic timer mode register (bmod) interval timer to delay execution of cpu instructions d uring the wait time.
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 9 timing waveforms t srel t wait v dd reset execution of stop instruction v dddr data retention mode stop mode internal reset operation idle mode operating mode figure 13 ? 2. stop mode release timing when initiated by reset v dd execution of stop instruction v dddr data retention mode stop mode t wait t srel idle mode normal operating mode power-down mode terminating signal (interrupt request) figure 13 ? 3. stop mode release timing when initiated by interrupt request
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 10 timing waveforms (continued) 0. 8 v dd 0. 2 v dd 0. 8 v dd 0. 2 v dd measurement points figure 13 ? 4. a.c. timing measurement points (except for x in ) xin t xl t xh 1 / fx v d d - 0.1 v 0.1 v figure 13 ? 5. clock timing measurement at x in tcl t til t tih 1 / f ti 0. 8 v dd 0. 2 v dd figure 13 ? 6. tcl timing
ks57c0404/c0408/p0408 microcontroller e lectrical data 13 ? 11 reset t rsl 0.2 v dd figure 13 ? 7. input timing for reset signal int0, 1, 2, 4 ks0 to ks7 t intl t inth 0.8 v dd 0.2 v dd figure 13 ? 8. input timing for external interrupts and quasi-interrupts
electrical data ks57c0404/c0408/p04 08 microcontroller 13 ? 12 sck tkl tkh tkcy 0.8 vdd input data output data 0.2 vdd 0.8 vdd 0.2 vdd si so tkso tsik tksi figure 13 ? 9. serial data transfer timing
KS57C0408/p040 8 microcontroller echanical data 14 ? 1 14 mechanical data this section contains the following information about the device package: ? 42-sdip-600 package dimensions in millimeters ? 44-qfp-1010b package dimensions in millimeters n o t e : d i m e n s i o n s a r e i n m i l l i m e t e r s . 4 2 - s d i p - 6 0 0 1 4 . 0 0 0 . 2 0 . 5 0 0 . 1 3 9 . 1 0 0 . 2 0 ~ 1 5 0 . 2 5 + 0 . 1 ? 0 . 0 5 # 1 # 2 1 # 4 2 # 2 2 1 5 . 2 4 ( 1 . 7 7 ) 1 . 0 0 0 . 1 1 . 7 7 8 0 . 5 1 m i n 3 . 5 0 0 . 2 3 . 3 0 0 . 3 5 . 0 8 m a x figure 14 ? 1. 42-sdip-600 package dimensions
mechanical data ks57 c0408/p040 8 microcontroller 14 ? 2 n o t e : d i m e n s i o n s a r e i n m i l l i m e t e r s . 4 4 - q f p - 1 0 1 0 b 1 3 . 2 0 0 . 3 0 1 0 . 0 0 0 . 2 # 4 4 1 3 . 2 0 0 . 3 0 1 0 . 0 0 0 . 2 # 1 0 . 8 0 0 . 8 0 0 . 2 0 0 . 1 5 + 0 . 1 ? 0 . 0 5 0 . 1 m a x 0 . 0 m i n 2 . 0 5 0 . 1 2 . 3 0 m a x 0 ~ 8 0 . 3 5 + 0 . 1 0 - 0 . 0 5 1 . 0 0 figure 14 ? 2. 44-qfp-1010b package dimensions
ks57c0404/c0408/p0408 microcontroller ks57p0408 otp 15- 1 15 ks57p0408 otp overview the ks57p0408 single-chip cmos microcontroller is the otp (one time programmable) version of the ks57c0404/c0408 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the ks57p0408 is fully compatible with the ks57c0404/c0408, both in function and in pin configuration. because of its simple programming requirements, the ks57p0408 is ideal for use as an evaluation chip for the ks57c0404/c0408. vss / vss p7.0 / ks4 p7.1 / ks5 p7.2 / ks6 p7.3 / ks7 p6.0 / ks0 p6.1 / ks1 p6.2 / ks2 p6.3 / ks3 xin xout reset / reset p5.0 p5.1 p5.2 p5.3 p4.0 p4.1 p4.2 p4.3 test / test 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 p1.3 / int4 p1.2 / int2 p1.1 / int1 p1.0 / int0 p2.3 / buz p2.2 / clo p2.1 / tclo1 p2.0 / tclo0 p0.3 / btco p0.2 / si p0.1 / so p0.0 / sck p8.3 p8.2 p8.1 p8.0 p3.3 p3.2 sdat / p3.1 / tcl1 sclk / p3.0 / tcl0 vdd / vdd ks57p0408 (42-sdip-600) note: the bolds indicate an otp pin name. figure 15 ? 1. ks57p0408 pin assignments (42-sdip package)
ks57p0408 otp ks57c0404/c0408/p04 08 microcontroller 15- 2 nc p8.0 p8.1 p8.2 p8.3 p0.0 / sck p0.1 / so p0.2 / si p0.3 / btco p2.0 / tclo0 p2.1 / tclo1 p2.2 / clo p2.3 / buz p1.0 / int0 p1.1 / int1 p1.2 / int2 p1.3 / int4 vss / vss p7.0 / ks4 p7.1 / ks5 p7.2 / ks6 p7.3 / ks7 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 nc p3.3 p3.2 sdat / p3.1 / tcl1 s clk / p3.0 / tcl0 vdd / vdd test / test p4.3 p4.2 p4.1 p4.0 ks57p0408 (44-qfp-1010b) 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 p5.3 p5.2 p5.1 p5.0 reset /reset xout xin p6.3/ks3 p6.2/ks2 p6.1/ks1 p6.0/ks0 note: the bolds indicate an otp pin name. figure 15 ? 2. ks57p0408 pin assignments (44-qfp package)
ks57c0404/c0408/p0408 microcontroller ks57p0408 otp 15- 3 table 15 ? 1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p3.1 sdat 19 (37) i/o serial data pin. output port when reading and input port when writing. can be assigned as a input / push-pull output port. p3.0 sclk 20 (38) i/o serial clock pin. input only pin. test v pp (test) 22 (40) i power supply pin for eprom cell writing (indicates that otp enters into the writing mode). when 12.5 v is applied, otp is in writing mode and when 5 v is applied, otp is in reading mode. (option) reset reset 31 (5) i chip initialization v dd / v ss v dd / v ss 21/42(39/16) i logic power supply pin. v dd should be tied to +5 v during programming. note: ( ) means the 44-qfp otp pin number. table 15 ? 2. comparison of ks57p0408 and ks57c0404/c0408 features characteristic ks57p0408 ks57c0404/c0408 program memory 8 k-byte eprom 4 k-byte mask rom: ks57c0404 8 k-byte mask rom: KS57C0408 operating voltage (v dd ) 2.0 v to 5.5 v 1.8 v to 5.5v otp programming mode v dd = 5 v, v pp (test)=12.5v pin configuration 42sdip, 44qfp 42sdip, 44qfp eprom programmability user program 1 time programmed at the factory operating mode characteristics when 12.5 v is supplied to the v pp (test) pin of the ks57p0408, the eprom programming mode is entered. the operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in table 15 ? 3 below. table 15 ? 3. operating mode selection criteria v dd vpp (test) reg/ mem address (a15-a0) r/w mode 5 v 5 v 0 0000h 1 eprom read 12.5 v 0 0000h 0 eprom program 12.5 v 0 0000h 1 eprom verify 12.5 v 1 0e3fh 0 eprom read protection note : "0" means low level; "1" means high level.
ks57p0408 otp ks57c0404/c0408/p04 08 microcontroller 15- 4 table 15 ? 4. d.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.5 v) parameter symbol conditions min typ max units input high voltage v ih1 all input pins except those specified below for v ih2 ? v ih4 0.7 v dd ? v dd v v ih2 ports 0, 1, 3, 6, 7, and reset 0.8 v dd v ih3 ports 4 and 5 with pull-up resistors assigned 0.7 v dd ports 4 and 5 are open-drain v ih4 x in and x out v dd ? 0.1 input low voltage v il1 all input pins except those specified below for v il2 ? v il3 ? ? 0.3 v dd v v il2 ports 0, 1, 3, 6, 7, and reset 0.2 v dd v il3 x in and x out 0.1 output high voltage v oh i oh = ? 1 ma ports except 1, 4, and 5 v dd ? 1.0 ? ? v output low voltage v ol1 v dd = 4.5 v to 5.5 v i ol = 15 ma, ports 4, 5 only ? ? 2 v v dd = 2.0 to 5.5 v i ol = 1.6ma 0.4 v ol2 v dd = 4.5 v to 5.5 v i ol = 4 ma all output ports except ports 4,5 2 v dd = 2.0 to 5.5 v i ol = 1.6ma 0.4 input high leakage current i lih1 v i = v dd all input pins except those specified below for i lih2 ? ? 3 a i lih2 v i = v dd x in and x out 20 input low leakage current i lil1 v i = 0 v all input pins except below and reset ? ? ? 3 a i lil2 v i = 0 v x i n and x out only ? 20
ks57c0404/c0408/p0408 microcontroller ks57p0408 otp 15- 5 table 15 ? 4. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.5 v) parameter symbol conditions min typ max units output high leakage current i loh v o = v dd, all output pins ? ? 3 a output low leakage current i lol v o = 0 v, all output pins ? ? ? 3 a pull-up resistor r l1 v i = 0 v; v dd = 5 v ports 0, 1 (not p1.3), 2, 3, 6, 7 25 47 100 k w v dd = 3 v 50 95 200 r l2 v o = v dd ? 2v; v dd = 5v ports 4 and 5 only 15 47 70 v dd = 3 v 10 45 60 r l3 v dd = 5 v; v i = 0v; reset 100 220 400 v dd = 3 v 200 450 800 pull-down r l4 v dd = 5 v; v i = v dd ; port 8 25 47 100 k w resistor v dd = 3 v 50 95 200 supply i dd1 run mode; v dd = 5 v 10% 6.0 mhz ? 3.9 8.0 ma current (1) crystal oscillator; c1 = c2 = 22 pf 4.19 mhz 2.9 5.5 v dd = 3 v 10% 6.0 mhz 1.8 4.0 4.19 mhz 1.3 3.0 i dd2 run mode; v dd = 5 v 10% 6.0 mhz ? 1.3 2.5 ma crystal oscillator, c1 = c2 = 22 pf 4.19 mhz 1.2 1.8 v dd = 3 v 10% 6.0 mhz 0.5 1.5 4.19 mhz 0.44 1.0 i dd 3 stop mode; v dd = 5 v 10% ? 0.2 3 a stop mode; v dd = 3 v 10% 0.1 2 notes 1. d.c. electrical values for supply current (i dd1 to i dd3 ) do not include current drawn through internal pull-up resistors. 2. the supply current assumes a cpu clock of fx/4.
ks57p0408 otp ks57c0404/c0408/p04 08 microcontroller 15- 6 table 15 ? 5. a.c. electrical characteristics (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.5 v) parameter symbol conditions min typ max units instruction cycle time t cy v dd = 2.7 v to 5.5 v 0.67 ? 64 s v dd = 2.0 v to 5.5 v 0.95 tcl0, tcl1 input frequency f ti0 , f ti1 v dd = 2.7 v to 5.5 v 0 ? 1.5 mhz v dd = 2.0 v to 5.5v 1 tcl0, tcl1 input high, low width t tih0 , t til0 t tih1 , t til1 v dd = 2.7 v to 5.5 v 0.48 ? ? s v dd = 2.0 v to 5.5 v 1.8 sck cycle time t kcy v dd = 2.7 v to 5.5 v external sck source 800 ? ? s internal sck source 670 v dd = 2.0 v to 5.5 v external sck source 3200 internal sck source 3800 sck high, low width t kh, t kl v dd = 2.7 v to 5.5 v external sck source 335 ? ? s internal sck source t kcy / 2 ? 50 v dd = 2.0 v to 5.5 v external sck source 1600 internal sck source t kcy / 2 ? 150
ks57c0404/c0408/p0408 microcontroller ks57p0408 otp 15- 7 table 15 ? 5. a.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.0 v to 5.5 v) parameter symbol conditions min typ max units si setup time to sck high t sik v dd = 2.7 v to 5.5 v external sck source 100 ? ? ns internal sck source 150 v dd = 2.0 v to 5.5 v external sck source 150 internal sck source 500 si hold time to sck high t ksi v dd = 2.7 v to 5.5 v external sck source 400 ? ? ns internal sck source 400 v dd = 2.0 v to 5.5 v external sck source 600 internal sck source 500 output delay for sck to so t kso (1) v dd = 2.7 v to 5.5 v external sck source ? ? 300 ns internal sck source 250 v dd = 2.0 v to 5.5 v external sck source 1000 internal sck source 1000 interrupt input high, low width t inth , t intl int0 (2) ? ? m s int1, int2, int4, ks0 - ks7 10 reset input low width t rsl input 10 ? ? m s notes 1. r(1kohm) and c(100pf) are the load resist ance and load capacitance of the so output line. 2. minimum value for int0 is based on a clock of 2t cy or 128 / fx as assigned by the imod0 register setting.
ks57p0408 otp ks57c0404/c0408/p04 08 microcontroller 15- 8 cpu clock = 1/n x oscillator frequency (n = 4, 8, 64) supply voltage (v) 1.05 khz 1.5 mhz 15.625 khz cpu clock 4.2 mhz 6 mhz 400 khz main osc. freq. ( divided by 4 ) 1 2 3 4 5 6 7 figure 15 ? 3. standard operating voltage range
ks57c0404/c0408/p0408 microcontroller ks57p0408 otp 15- 9 start address= first location v dd =5v, v pp =12.5v x = 0 program one 1ms pulse increment x x = 10 verify 1 byte last address v dd = v pp = 5 v compare all byte device passed increment address verify byte device failed pass fail no fail yes fail no figure 15 ? 4. otp programming algorithm
ks57p0408 otp ks57c0404/c0408/p04 08 microcontroller 15- 10 notes

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